Astability versus Bistability in van der Waals Tunnel Diode for Voltage Controlled Oscillator and Memory Applications

van der Waals (vdW) tunnel junctions are attractive because of their atomically sharp interface, gate tunability, and robustness against lattice mismatch between the successive layers. However, the negative differential resistance (NDR) demonstrated in this class of tunnel diodes often exhibits noisy behavior with low peak current density and lacks robustness and repeatability, limiting their practical circuit applications. Here, we propose a strategy of using a 1L-WS2 as an optimum tunnel barrier sandwiched in a broken gap tunnel junction of highly doped black phosphorus (BP) and SnSe2. We achieve high yield tunnel diodes exhibiting highly repeatable, ultraclean, and gate-tunable NDR characteristics with a signature of intrinsic oscillation, and a large peak-to-valley current ratio (PVCR) of 3.6 at 300 K (4.6 at 7 K), making them suitable for practical applications. We show that the thermodynamic stability of the vdW tunnel diode circuit can be tuned from astability to bistability by altering the constraint through choosing a voltage or a current bias, respectively. In the astable mode under voltage bias, we demonstrate a compact, voltage-controlled oscillator without the need for an external tank circuit. In the bistable mode under current bias, we demonstrate a highly scalable, single-element, one-bit memory cell that is promising for dense random access memory applications in memory intensive computation architectures.