Tunable Charge-Trap Memory Based on Few-Layer MoS2
Source abstract
Abstract
Charge-trap memory with high-κ dielectric materials is considered to be a promising candidate for next-generation memory devices. Ultrathin layered two-dimensional (2D) materials like graphene and MoS2 have been receiving much attention because of their fantastic physical properties and potential applications in electronic devices. Here, we report on a dual-gate charge-trap memory device composed of a few-layer MoS2 channel and a three-dimensional (3D) Al2O3/HfO2/Al2O3 charge-trap gate stack. Because of the extraordinary trapping ability of both electrons and holes in HfO2, the MoS2 memory device exhibits an unprecedented memory window exceeding 20 V. Importantly, with a back gate the window size can be effectively tuned from 15.6 to 21 V; the program/erase current ratio can reach up to 10(4), allowing for multibit information storage. Moreover, the device shows a high endurance of hundreds of cycles and a stable retention of ∼ 28% charge loss after 10 years, which is drastically lower than ever reported MoS2 flash memory. The combination of 2D materials with traditional high-κ charge-trap gate stacks opens up an exciting field of nonvolatile memory devices.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: 2D Materials and Applications · Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
State Key Laboratory of Surface Physics and Department of Physics, Fudan University, Shanghai 200433, China
Department of Materials Science, Fudan University, Shanghai 200433, China
State Key Laboratory of ASIC and System, Department of Microelectronics, Fudan University, Shanghai 200433, China
Funding
Science and Technology Commission of Shanghai Municipality · National Natural Science Foundation of China · CPC Central Committee
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