Unveiling the Role of Nanoscale-Thick Thermal Enhancement Layers in Tuning Analog Switching and Synaptic Plasticity of Memristor

Memristor-based neuromorphic systems offer a promising solution to meet the increasing computational and memory demands of AI, edge computing, and IoT applications. Achieving energy-efficient and biologically realistic learning in a neural system requires an analog memristor with gradual and symmetric weight updates. However, the abrupt SET switching behavior commonly observed in the memristor limits the synaptic precision. To address this issue, we explore the integration of thermal enhancement layers (TELs), including AlO X, TaO X, TiO X, WO X, and ZrO X, with HfO X memristor using a fully calibrated and physics-based simulation model. The results show that TEL with balanced thermal conductivity and electrical conductivity enables more linear and symmetric weight updates, which significantly reduces energy consumption under increasing spiking activity, going beyond the effect of the low thermal conductivity layer option. Specifically, the WO X integrated HfO X memristor demonstrates excellent synaptic performance, marked by low nonlinearity values (NL P = 0.21 in long-term potentiation and NL D = 0.16 in long-term depression) and a substantial nearly 5× reduction in energy consumption over the baseline HfO X memristor. It further demonstrates enhanced robustness against cyclic variability, though it is accompanied by a slight increase in switching time and thermal sensitivity. Moreover, the benefits of TEL integration become significant only when the TEL thickness exceeds 30 nm, owing to the improved heat confinement. Our results provide a strategic basis for selecting TEL material, which can boost synaptic behavior for advancing neuromorphic hardware toward greater energy efficiency and learning accuracy.