Understanding Sources of Electrical Disorder in Graphene Grown by Chemical Vapor Deposition for Wafer-Scale Device Applications

We present a comprehensive explanation of the sources of electrical disorder in graphene grown by chemical vapor deposition (CVD) and transferred onto SiO2 substrates. By correlating carrier concentration distribution to the topographical mapping, we show that, due to the embedded ripple array created by the thermal expansion mismatch during growth, graphene forms uneven charge interaction with the SiO2 substrate, causing the areas in proximity of SiO2 to have higher hole concentration while the raised regions have lower hole doping. The net disorder of graphene is, therefore, a function of the density and scale of the thermal expansion ripples. We further show that, while the ripple-induced topographical nonuniformity can be alleviated by thermal annealing, the reduced topography actually has competing effects on overall disorder. On one hand, the reduced topography decreases the concentration nonuniformity between the raised and lowered regions, but on the other hand, annealing more closely couples the entire graphene layer to impurities in the SiO2 substrate. The results show that the ripple structure is not a disorder source by itself, but only contributes to disorder via the substrate interaction. This study suggests that minimizing substrate-induced disorder is of fundamental importance to reducing electrical disorder in transferred CVD graphene, which is significant for enabling wafer-scale integration of graphene devices for electronic, photonic, and sensing applications.