Novel vertical contact architecture for significantly reduced contact resistance in 2D nanosheet FETs
Source abstract
Abstract
Two-dimensional (2D) nanosheet FETs are promising for sub-1 nm node scaling, prompting extensive research into fabrication and materials integration. However, structural optimization—especially reducing contact resistance ( R CNT )—remains underexplored. Here, we propose a novel three-dimensional multi-nanosheet (mNS) FET featuring a vertical contact structure. Unlike conventional lateral contacts, the proposed design leverages gate-induced electrostatic doping across the entire contact interface, reducing tunneling barriers and improving carrier injection without additional doping. Numerical simulations under realistic conditions (low doping and finite Schottky barriers) show up to ~41% R CNT reduction compared to conventional structures. Additionally, parasitic capacitance reduction during standby operation, combined with lower R CNT , significantly mitigates fan-out-induced delays. Circuit-level benchmarks confirm practical advantages, achieving up to 133% higher frequency in a 17-stage fanout-3 inverter and up to 73% faster 6 T SRAM read/write access. These results highlight the proposed architecture’s potential for next-generation ultra-low-power, high-performance 2D electronics.
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Research context
OpenAlex topics: Advancements in Semiconductor Devices and Circuit Design · Ferroelectric and Negative Capacitance Devices · 2D Materials and Applications
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (38)
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