The effects of prolonged high-voltage STM scanning on an oxidized silicon wafer surface
Source abstract
Abstract
The use of a scanning tunneling microscope (STM) for microroughness measurements of polished silicon wafers has been restricted to well cleaned surfaces. In this work it is shown that the water bound to the native oxide layer, not the oxide layer itself, causes the difficulties associated with STM work. Using prolonged scanning with a high bias voltage, we were able to remove bonded water and thus a wafer surface covered with the native oxide layer could be analysed. Prolonged scanning at a high voltage was also shown to be capable of partially removing the native oxide layer itself, thus giving a more correct value for the surface roughness of the silicon wafer surface. On the other hand, prolonged scanning using a lower imaging voltage increased the oxidation of the surface.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Force Microscopy Techniques and Applications · Semiconductor materials and devices · Advancements in Photolithography Techniques
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (10)
Show source-provided references
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