Cavity‐first approach for microelectromechanical system–CMOS monolithic integration

Presented is a cavity‐first approach for producing released microelectromechanical system (MEMS) structures from the front side of a silicon on insulator (SOI) wafer. This approach shows excellent process compatibilities to CMOS and is significantly valuable to MEMS–CMOS monolithic integration. In this approach, prior to metal layer deposition and other components fabrication, which are easily damaged by vapour‐phase hydrofluoric (HF) acid, release holes with a diameter of a few micrometres were created in the active silicon layer, and the cavities were formed after removing the underneath SiO ₂ box layer by vapour‐phase HF etching. An amorphous fluoropolymer thin film was then successfully introduced to refill those release holes without entering into the cavities, after which the wafer can be fabricated by standard process with negligible surface fluctuation. Finally, MEMS structures were released from the front side of the wafer by inductively coupled plasma reactive ion etching (ICP‐RIE). This approach enables monolithic integration of MEMS with CMOS circuits on SOI wafers with easy‐package capability, eliminates the requirements on device release by wet chemical etching or ICP‐RIE from the backside of the wafer and reduces the risk of device damage by vapour‐phase HF etching. This approach also excels others in simplicity and high yields with better thickness uniformity and less residual stress in a MEMS structure.