E-Mode GaN p-MOSFET Based on a Double Heterostructure with a Buried Back Gate Achieving Low Subthreshold Slope and Zero Hysteresis
Source abstract
Abstract
In this study, an approach and device structure to improve threshold voltage V TH stability and subthreshold slope (SS) of GaN p-MOSFET are reported. Based on the p-GaN/AlN/AlGaN/AlN/GaN double heterostructure, the proposed enhancement-mode (E-mode) GaN p-MOSFET features an intrinsic buried back gate (BBG) by employing the 2DEG channel at the buried AlGaN/AlN/GaN heterojunction. The BBG effectively mitigates the defective MOS-gate interface issue and endows the device with excellent V TH stability (Δ V TH < 0.2 V) within a large gate swing at room and high temperatures (25–150 °C). Moreover, benefiting from the BBG-enhanced gate-to-channel controllability, a high I ON / I OFF current ratio of ∼10 8 and an ultralow SS of 85.6 mV/dec are obtained. Besides, the device with a dual-gate structure delivers a high V TH of –2 V with excellent pinch-off at zero gate bias showing a decent E-mode operation.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: GaN-based semiconductor devices and materials · Silicon Carbide Semiconductor Technologies · Advancements in Semiconductor Devices and Circuit Design
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
School of Integrated Circuit Science and Engineering
University of Electronic Science and Technology of China (UESTC)
Sichuan Ai-Link Technology Co. Ltd.
China Resources Microelectronics (Chongqing)
Institute of Electronic and Information Engineering of UESTC in Guangdong, UESTC
Funding
Basic and Applied Basic Research Foundation of Guangdong Province · China Postdoctoral Science Foundation · Science and Technology Department of Sichuan Province · National Natural Science Foundation of China
References (31)
Show source-provided references
1. 10.4028/www.scientific.net/MSF.778-780.107710.4028/www.scientific.net/MSF.778-780.1077 ↗
2. 10.1109/TED.2017.265757910.1109/TED.2017.2657579 ↗
3. 10.1088/1361-6463/aaaf9d10.1088/1361-6463/aaaf9d ↗
4. Kinzer D. · 2020
5. 10.1063/1.274258910.1063/1.2742589 ↗
6. 10.1109/LED.2016.251510310.1109/LED.2016.2515103 ↗
7. 10.1109/LED.2019.295403510.1109/LED.2019.2954035 ↗
8. 10.1109/LED.2019.291625310.1109/LED.2019.2916253 ↗
9. 10.1038/s41928-021-00611-y10.1038/s41928-021-00611-y ↗
10. 10.1109/TED.2021.312626710.1109/TED.2021.3126267 ↗
11. 10.1103/PhysRevLett.123.09660210.1103/PhysRevLett.123.096602 ↗
12. 10.1063/1.37209810.1063/1.372098 ↗
13. 10.1016/j.jallcom.2020.15735610.1016/j.jallcom.2020.157356 ↗
14. Chowdhury N. · 2020
15. 10.1109/LED.2022.314028110.1109/LED.2022.3140281 ↗
16. Nomoto K. · International Electron Devices Meeting (IEDM) · 2020
17. Raj A. · International Electron Devices Meeting (IEDM) · 2021
18. Li T. · 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD) · 2024 · 160
19. 10.1109/TED.2021.312971210.1109/TED.2021.3129712 ↗
20. 10.1109/LED.2021.309204010.1109/LED.2021.3092040 ↗
21. 10.1109/LED.2022.315230810.1109/LED.2022.3152308 ↗
22. 10.1109/TED.2024.336567610.1109/TED.2024.3365676 ↗
23. 10.1109/LED.2022.314965910.1109/LED.2022.3149659 ↗
24. 10.1063/5.018706410.1063/5.0187064 ↗
25. 10.1109/LED.2024.335493510.1109/LED.2024.3354935 ↗
26. Chen K. L. · 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD) · 2024 · 315
27. 10.1109/TED.2013.227233010.1109/TED.2013.2272330 ↗
28. 10.4218/etrij.93.0193.000210.4218/etrij.93.0193.0002 ↗
29. 10.35848/1347-4065/ac4f7910.35848/1347-4065/ac4f79 ↗
30. 10.1109/LED.2021.311477610.1109/LED.2021.3114776 ↗
31. Zhang L. · 2021