journal article·2026-06-23

E-Mode GaN p-MOSFET Based on a Double Heterostructure with a Buried Back Gate Achieving Low Subthreshold Slope and Zero Hysteresis

Enchuan Duan, Yunfei Ma, Binju Qiu, Jinggui Zhou, Shuting Huang, Xia Xiao, Bo Zhang, Qi Zhou

ACS Applied Electronic Materials· Volume 8· Issue 12
Publisher page

Abstract

In this study, an approach and device structure to improve threshold voltage V TH stability and subthreshold slope (SS) of GaN p-MOSFET are reported. Based on the p-GaN/AlN/AlGaN/AlN/GaN double heterostructure, the proposed enhancement-mode (E-mode) GaN p-MOSFET features an intrinsic buried back gate (BBG) by employing the 2DEG channel at the buried AlGaN/AlN/GaN heterojunction. The BBG effectively mitigates the defective MOS-gate interface issue and endows the device with excellent V TH stability (Δ V TH < 0.2 V) within a large gate swing at room and high temperatures (25–150 °C). Moreover, benefiting from the BBG-enhanced gate-to-channel controllability, a high I ON / I OFF current ratio of ∼10 8 and an ultralow SS of 85.6 mV/dec are obtained. Besides, the device with a dual-gate structure delivers a high V TH of –2 V with excellent pinch-off at zero gate bias showing a decent E-mode operation.
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Research context

OpenAlex topics: GaN-based semiconductor devices and materials · Silicon Carbide Semiconductor Technologies · Advancements in Semiconductor Devices and Circuit Design

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

School of Integrated Circuit Science and Engineering

University of Electronic Science and Technology of China (UESTC)

Sichuan Ai-Link Technology Co. Ltd.

China Resources Microelectronics (Chongqing)

Institute of Electronic and Information Engineering of UESTC in Guangdong, UESTC

Funding

Basic and Applied Basic Research Foundation of Guangdong Province · China Postdoctoral Science Foundation · Science and Technology Department of Sichuan Province · National Natural Science Foundation of China

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