Dielectric Constant Enhancement and Leakage Current Suppression of Metal–Insulator–Metal Capacitors by Atomic Layer Annealing and the Capping Layer Effect Prepared with a Low Thermal Budget
Source abstract
Abstract
A high-quality nanoscale oxide layer with a high dielectric constant and a low leakage current prepared at a low thermal budget is critical to advanced metal–insulator–metal (MIM) devices. In this study, the film density, crystallinity, dielectric constant, and leakage current of the ZrO 2 thin film are significantly improved by the atomic layer annealing (ALA) and the titanium nitride (TiN) capping layer effect at a low process temperature of only 300 °C without any postannealing treatment. Hence a high ZrO 2 dielectric constant of 35.2, a low equivalent oxide thickness of 0.64 nm, and a leakage current density lower than 10 –7 A/cm 2 are demonstrated in the MIM capacitors. This study demonstrates the significant impacts of the ALA and capping layer effects on the film quality and electrical characteristics of nanoscale thin films for high-performance devices.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Semiconductor materials and devices · Ferroelectric and Negative Capacitance Devices · Copper Interconnects and Reliability
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Department of Materials Science and Engineering, National Taiwan University, Taipei 10617, Taiwan
Funding
National Science and Technology Council · Taiwan Semiconductor Manufacturing Company
References (75)
Show source-provided references
1. 10.1149/09703.0081ecst10.1149/09703.0081ecst ↗
2. 10.1109/TED.2005.85064210.1109/TED.2005.850642 ↗
3. 10.5755/j02.eie.2810210.5755/j02.eie.28102 ↗
4. 10.1149/1.320506910.1149/1.3205069 ↗
5. 10.3390/ma1523832510.3390/ma15238325 ↗
6. Lin, C.Y.; Avci, U. E.; Blount, M.; Grover, R.; Hicks, J.; Kasim, R.; Kundu, A.; Pelto, C.; Ryder, C.; Schmitz, A.Reliability Characteristics of a High Density Metal-Insulator-Metal Capacitor on Intel’s 10+ Process; 2020 IEEE International Reliability Physics Symposium (IRPS); IEEE: 2020; pp 1–4.10.1109/IRPS45951.2020.9128312 ↗
7. Vera, X.Inside Tiger Lake: Intel’s Next Generation Mobile Client CPU; Hot Chips Symposium; 2020; pp 1–26.10.1109/HCS49909.2020.9220443 ↗
8. Nassif, N.; Munch, A. O.; Molnar, C. L.; Pasdast, G.; Lyer, S. V.; Yang, Z.; Mendoza, O.; Huddart, M.; Venkataraman, S.; Kandula, S.Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor; 2022 IEEE International Solid-State Circuits Conference (ISSCC); IEEE: 2022; pp 44–46.10.1109/ISSCC42614.2022.9731107 ↗
9. Moon, S.; Nam, S.; Kang, M.; Lee, Y.Design and Analysis of MIM Capacitor on Power Integrity Effects for HPC and Network Applications; 2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+ SIPI); IEEE: 2019; pp 199–204.10.1109/ISEMC.2019.8825290 ↗
10. 10.1109/TED.2018.286884910.1109/TED.2018.2868849 ↗
11. Auth, C.; Allen, C.; Blattner, A.; Bergstrom, D.; Brazier, M.; Bost, M.; Buehler, M.; Chikarmane, V.; Ghani, T.; Glassman, T.A 22nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors; 2012 symposium on VLSI technology (VLSIT); IEEE: 2012; pp 131–132.10.1109/VLSIT.2012.6242496 ↗
12. 10.1039/D0TC02346A10.1039/D0TC02346A ↗
13. 10.1063/1.133999410.1063/1.1339994 ↗
14. 10.1063/1.132648210.1063/1.1326482 ↗
15. 10.1109/TED.2022.322332710.1109/TED.2022.3223327 ↗
16. 10.1016/j.tsf.2022.13955710.1016/j.tsf.2022.139557 ↗
17. 10.1016/j.sse.2007.09.03010.1016/j.sse.2007.09.030 ↗
18. Kil, D.S.; Song, H.S.; Lee, K.J.; Hong, K.; Kim, J.H.; Park, K.S.; Yeom, S.J.; Roh, J.S.; Kwak, N.J.; Sohn, H.C.Development of new TiN/ZrO2/Al2O3/ZrO2/TiN capacitors extendable to 45nm generation DRAMs replacing HfO2based dielectrics; 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers; IEEE: 2006; pp 38–39.10.1109/VLSIT.2006.1705205 ↗
19. 10.1109/TDMR.2017.269928710.1109/TDMR.2017.2699287 ↗
20. 10.1109/LED.2009.201252010.1109/LED.2009.2012520 ↗
21. Cho, S. T.; An, C. H.; Kim, S. H.; Kim, D. G.; Kwon, D. S.; Cha, S. H.; Hwang, C.Electrical and Structural Properties of ZrO2/Y2O3/ZrO2Dielectric Film for DRAM Capacitor; ECS Meeting Abstracts; IOP Publishing: 2018; p 2524.10.1149/MA2018-01/44/2524 ↗
22. 10.1007/s10854-022-08097-w10.1007/s10854-022-08097-w ↗
23. 10.1002/admt.20220041210.1002/admt.202200412 ↗
24. 10.1080/21870764.2022.210121610.1080/21870764.2022.2101216 ↗
25. 10.1002/pssr.20190028210.1002/pssr.201900282 ↗
26. 10.1109/TDMR.2012.220405810.1109/TDMR.2012.2204058 ↗
27. 10.1016/j.tsf.2010.04.01710.1016/j.tsf.2010.04.017 ↗
28. 10.1149/10404.0121ecst10.1149/10404.0121ecst ↗
29. Onaya T. · IEICE Technol. Rep. · 2016 · 116 · 27
30. 10.1016/j.tsf.2018.02.01010.1016/j.tsf.2018.02.010 ↗
31. Onaya T. · IEICE Technol. Rep. · 2016 · 116 · 27
32. 10.1186/s11671-019-2874-510.1186/s11671-019-2874-5 ↗
33. Li, L.; Zhu, Z.; Wang, T.; Currivan-Incorvia, J. A.; Yoon, A.; Wong, H.S. P.BEOL compatible graphene/Cu with improved electromigration lifetime for future interconnects; 2016 IEEE International Electron Devices Meeting (IEDM); IEEE: 2016; pp 9.5.1–9.5.4.10.1109/IEDM.2016.7838383 ↗
34. Chakraborty, W.; Grisafe, B.; Ye, H.; Lightcap, I.; Ni, K.; Datta, S.BEOL Compatible Dual-Gate Ultra Thin-Body W-Doped Indium-Oxide Transistor with Ion= 370μA/μm, SS= 73mV/dec and Ion/Ioff ratio> 4 × 109; 2020 IEEE Symposium on VLSI Technology; IEEE: 2020; pp 1–2.10.1109/VLSITechnology18217.2020.9265064 ↗
35. 10.1116/1.302103610.1116/1.3021036 ↗
36. 10.1002/pssr.20180045410.1002/pssr.201800454 ↗
37. 10.1016/j.tsf.2020.13795010.1016/j.tsf.2020.137950 ↗
38. 10.1021/cm021333t10.1021/cm021333t ↗
39. 10.1080/1058458021514510.1080/10584580215145 ↗
40. 10.1088/1361-6528/abbf6a10.1088/1361-6528/abbf6a ↗
41. 10.1002/anie.20030165210.1002/anie.200301652 ↗
42. Kim, I.; Cho, S.; Im, D.; Cho, E.; Kim, D.; Oh, G.; Ahn, D.; Park, S.; Nam, S.; Moon, J.High performance PRAM cell scalable to sub-20nm technology with below 4F2 cell size, extendable to DRAM applications; 2010 Symposium on VLSI Technology; IEEE: 2010; pp 203–204.10.1109/VLSIT.2010.5556228 ↗
43. 10.1002/adma.20070108510.1002/adma.200701085 ↗
44. 10.1016/j.sse.2005.10.02410.1016/j.sse.2005.10.024 ↗
45. 10.1063/1.475790710.1063/1.4757907 ↗
46. 10.1038/srep3971710.1038/srep39717 ↗
47. 10.1021/acssuschemeng.8b0398210.1021/acssuschemeng.8b03982 ↗
48. 10.1039/C9TC04801D10.1039/C9TC04801D ↗
49. 10.1021/acsaelm.9b0008010.1021/acsaelm.9b00080 ↗
50. 10.1007/s11837-018-3140-510.1007/s11837-018-3140-5 ↗
51. 10.1016/j.apsusc.2021.15115210.1016/j.apsusc.2021.151152 ↗
52. 10.1088/1361-6528/abc11510.1088/1361-6528/abc115 ↗
53. 10.1016/0955-2219(95)91295-Y10.1016/0955-2219(95)91295-Y ↗
54. 10.1111/j.1151-2916.1989.tb06322.x10.1111/j.1151-2916.1989.tb06322.x ↗
55. 10.1007/BF0037527510.1007/BF00375275 ↗
56. 10.1021/acsaelm.1c0016110.1021/acsaelm.1c00161 ↗
57. 10.1016/j.matdes.2020.10902010.1016/j.matdes.2020.109020 ↗
58. 10.1063/1.499561910.1063/1.4995619 ↗
59. 10.1016/j.tsf.2015.02.06610.1016/j.tsf.2015.02.066 ↗
60. 10.1063/1.37354510.1063/1.373545 ↗
61. 10.7567/JJAP.50.03620210.7567/JJAP.50.036202 ↗
62. 10.1016/0040-6090(80)90207-210.1016/0040-6090(80)90207-2 ↗
63. 10.1116/1.501179010.1116/1.5011790 ↗
64. 10.1116/1.57623810.1116/1.576238 ↗
65. 10.1103/PhysRevB.64.11542910.1103/PhysRevB.64.115429 ↗
66. 10.1116/1.177384010.1116/1.1773840 ↗
67. 10.1016/j.apsusc.2005.01.11810.1016/j.apsusc.2005.01.118 ↗
68. 10.1557/PROC-811-D1.310.1557/PROC-811-D1.3 ↗
69. 10.1016/j.jpcs.2017.07.03510.1016/j.jpcs.2017.07.035 ↗
70. 10.1016/j.tsf.2015.10.02610.1016/j.tsf.2015.10.026 ↗
71. 10.1016/j.tsf.2004.11.23210.1016/j.tsf.2004.11.232 ↗
72. 10.1016/j.jpcs.2021.11004610.1016/j.jpcs.2021.110046 ↗
73. 10.1063/1.360987510.1063/1.3609875 ↗
74. Hatem, F.; Chai, Z.; Zhang, W.; Fantini, A.; Degraeve, R.; Clima, S.; Garbin, D.; Robertson, J.; Guo, Y.; Zhang, J.Endurance improvement of more than five orders in GexSe1-xOTS selectors by using a novel refreshing program scheme; 2019 IEEE International Electron Devices Meeting (IEDM); IEEE: 2019; pp 35.2.1–35.2.4.10.1109/IEDM19573.2019.8993448 ↗
75. Popovici, M.; Belmonte, A.; Oh, H.; Potoms, G.; Meersschaut, J.; Richard, O.; Hody, H.; Van Elshocht, S.; Delhougne, R.; Goux, L.High-performance (EOT< 0.4 nm, Jg∼ 10–7A/cm2) ALD-deposited RuSrTiO3stack for next generations DRAM pillar capacitor; 2018 IEEE International Electron Devices Meeting (IEDM); IEEE: 2018; pp 2.7.1–2.7.4.10.1109/IEDM.2018.8614673 ↗