Slow Trap Properties and Generation in Al₂O₃/GeO_x/Ge MOS Interfaces Formed by Plasma Oxidation Process

For realizing Ge CMOS devices with a small equivalent oxide thickness (EOT) and a low density of fast interface states (Dit), understanding of slow traps in Ge gate stacks and reduction of its density are one of the most crucial issues. For this purpose, we examine slow trap density and locations of Al2O3/GeOx/Ge MOS gate stacks, which are fabricated by plasma oxidation in this work. In Al2O3/GeOx/Ge MOS interfaces formed by preplasma oxidation (pre-PO) and postplasma oxidation (post-PO), slow trap density has been compared. Also, the slow trap density on the thickness dependence of GeOx and Al2O3 is systematically evaluated for the Al2O3/GeOx/Ge MOS gate stacks formed by pre-PO. It is found that near the conduction band edge of Ge, additional electron slow traps will be generated by using the post-PO process. Above all, in the Al2O3/GeOx/Ge MOS interfaces with pre-PO. The main slow traps can be located near the GeOx/Ge interfaces for the electrons and the Al2O3/GeOx interfaces for the holes, respectively.