Optimized Design of Low Voltage High Current Ferrite Planar Inductor for 10 MHz On-chip Power Module
Source abstract
Abstract
In this paper, design parameters of high Q (> 50), high current inductor for on-chip power module were optimized by 4 Xs 3 Ys DOE (Design of Experiment). Coil spacing, coil thickness, ferrite thickness, and permeability were assigned to Xs, and inductance (L) and Q factor at 10 MHz, and resonance frequency ($f_r$) were determined Ys. Effects of each X on the Ys were demonstrated and explained using known inductor theory. Multiple response optimizations were accomplished by three derived regression equations on the Ys. As a result, L of 125 nH, Q factor of 197.5, and $f_r$ of 316.3 MHz were obtained with coil space of $127\;{\mu}m$, Cu thickness of $67.8\;{\mu}m$, ferrite thickness of $130.3\;{\mu}m$, and permeability 156.5. Loss tan ${\delta}=0$ was assumed for the estimation. Accordingly, Q factor of about 60 is expected at tan ${\delta}=0.02$.
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Research context
OpenAlex topics: Silicon Carbide Semiconductor Technologies · Advanced DC-DC Converters · Electromagnetic Compatibility and Noise Suppression
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