Deep level studies in high‐temperature annealed silicon wafers for layer transfer in thin‐film solar cells

Abstract Deep‐level transient spectroscopy (DLTS) has been applied to high‐temperature annealed n‐ and p‐type Si wafers. The aim is to identify the deep levels responsible for the observed minority carrier lifetime degradation after thin‐film transfer to a glass substrate. Anneals have been performed at 1150 °C in H₂ or Ar. Care has been taken to avoid radiation defect formation during the fabrication of the Al Schottky barriers used for DLTS. It is shown that besides a change in the carrier doping density and profile, an annealing‐induced electron trap at 0.43 eV below the conduction band edge can be found, which is related to a vacancy–impurity complex.